mirror of https://github.com/giuliof/nRF24-key.git
First commit
This commit is contained in:
commit
6208a8f16b
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MIT License
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||||||
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Copyright (c) <year> <copyright holders>
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||||||
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Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
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||||||
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||||||
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The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||||
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|
||||||
|
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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# nRF key
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Interface for Nordic nRF24L01 wireless modules.
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## Project structure
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||||||
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In this repository you can find:
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||||||
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```
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||||||
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nRF-key
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||||||
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|__ schematics --> KiCAD schematic
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|__ code --> source code for ATtiny2313 microcontroller
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```
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||||||
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## BOM
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||||||
|
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||||||
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|Designator | Description | MPN |
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||||||
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|--------------|----------------------------|-------------------|
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||||||
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|C2 C7 C8 C10 | capacitor 100n 0805 | 0805F104M500NT |
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|C9 | capacitor tantalum 10u | TAJA106K016RNJ |
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||||||
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|C5 C6 | capacitor 22p 0805 | 0805N220J500CT |
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||||||
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|D1 D2 D3 | red led 0805 | QBLP631-R |
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||||||
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|R1 R5 | resistor 10k 0805 | RC0805JR-0710KL |
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|R2 R3 R4 | Resistor 330 0805 | 0805W8J0331T5E |
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|U2 | microcontroller ATtiny2313 | ATTINY2313A-SU |
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|U1 | usb ttl uart ch340c | CH340C |
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|U3 | LDO voltage regulator 3v3 | MCP1700T-3302E/TT |
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|Y1 | crystal 8M | 1C208000BC0R |
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|
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||||||
|
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||||||
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## Code features
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|
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Communication with nRF key is via 9600baud 8N1 serial port. Data received from another module is printed. Data to send is packaged in a 32byte maximum structure and must be followed by CR. Bytes over 32 (except for CR) will be ignored.
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This is not a transparent bridge, but can be easily implemented.
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nRF24L01 registers (i.e. tx/rx addresses) can be reprogrammed pressing programming button (i.e. holding low BTN/PD4 line) while inserting key. Programming mode is selected (both TX_LED and RX_LED will turn on), next 32byte will be stored in settings EEPROM. Data is structured as following:
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| Byte n. | Function | nRF reg. |
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|---------|-------------------------------------------------|-----------|
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| 0 |Configure register | 0 |
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| 1 |Enable automatic answer function | 1 |
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| 2 |Enable receive address | 2 |
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| 3 |Setup address width | 3 |
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| 4 |Automatic retransmission | 4 |
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| 5 |Set channel frequency | 5 |
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| 6 |Set transmission rate, LNA gain, transmit power | 6 |
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| 7÷11|RX address for data channel 0 | 10 |
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|12÷16|RX address for data channel 1 | 11 |
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| 17 |RX address for data channel 2 | 12 |
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| 18 |RX address for data channel 3 | 13 |
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| 19 |RX address for data channel 4 | 14 |
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| 20 |RX address for data channel 5 | 15 |
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|21÷25|TX address | 16 |
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| 26 |RX data for channel 0 | 17 |
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| 27 |RX data for channel 1 | 18 |
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| 28 |RX data for channel 2 | 19 |
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| 29 |RX data for channel 3 | 20 |
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| 30 |RX data for channel 4 | 21 |
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| 31 |RX data for channel 5 | 22 |
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## How To
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⋅⋅⋅ Make the PCB and solde it (I have a protoboard version too);
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⋅⋅⋅ Obtain an AVR programmer (usbasp or Arduino as ISP)
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⋅⋅⋅ Compile the code:
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* install `gcc-avr` `avr-libc` `avrdude`;
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* move in code directory;
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* type `make`;
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* check in Makefile if the programmer is correct;
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* type `make eeprom` then `make flash`.
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## Authors
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|
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* **Giulio Fieramosca** - [giuliof](https://github.com/giuliof)
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|
|
||||||
|
|
||||||
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## License
|
||||||
|
|
||||||
|
This project is released under the MIT License - see the [LICENSE.md](LICENSE.md) file for details
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build/
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||||||
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output/
|
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||||||
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:200000000F0101031A280F3443101001C0FEBABE000102030434431010012020202020204B
|
||||||
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:20002000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE0
|
||||||
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:20004000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC0
|
||||||
|
:20006000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFA0
|
||||||
|
:00000001FF
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# Name of the project
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PROJ_NAME = nRF_USB
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######################################################################
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# SOURCES #
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######################################################################
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## Directories ##
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||||||
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# This is where the source files are located,
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# which are not in the current directory
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SRC_DIR = ./src
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# The header files we use are located here
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INC_DIR = ./src
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INC_DIR += .
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BUILD_DIR = build
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OUTPUT_DIR = output
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## FILES ##
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# c files
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SRCS = main.cpp
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SRCS += nRF24L01.cpp
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SRCS += UART.cpp
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# asm files
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# S maiuscola! Invoca prima il compilatore gcc che interpreta macro e altro
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# ASRC = main.S
|
||||||
|
|
||||||
|
# header files
|
||||||
|
# Specify here libraries! Makefile will check existance before launching
|
||||||
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# DEPS = foo.h
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||||||
|
|
||||||
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# Object files
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||||||
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# Automatically declares object file names
|
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OBJS = $(patsubst %.c, $(BUILD_DIR)/%.o, $(filter %.c,$(SRCS)) )
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||||||
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OBJS += $(patsubst %.cpp, $(BUILD_DIR)/%.cpp.o, $(filter %.cpp,$(SRCS)) )
|
||||||
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OBJS += $(patsubst %.s, $(BUILD_DIR)/%.s.o, $(filter %.s,$(ASRC)) )
|
||||||
|
OBJS += $(patsubst %.S, $(BUILD_DIR)/%.S.o, $(filter %.S,$(ASRC)) )
|
||||||
|
|
||||||
|
# Virtual Paths
|
||||||
|
# Tell make to look in that folder if it cannot find a source
|
||||||
|
# in the current directory
|
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|
vpath %.c $(SRC_DIR)
|
||||||
|
vpath %.cpp $(SRC_DIR)
|
||||||
|
vpath %.S $(SRC_DIR)
|
||||||
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vpath %.h $(INC_DIR)
|
||||||
|
|
||||||
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######################################################################
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||||||
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# SETUP TOOLS #
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||||||
|
######################################################################
|
||||||
|
|
||||||
|
# GCC/programming Tools
|
||||||
|
CC = avr-gcc
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||||||
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CXX = avr-g++
|
||||||
|
OBJCOPY = avr-objcopy
|
||||||
|
OBJDUMP = avr-objdump
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||||||
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GDB = avr-gdb
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||||||
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AS = avr-as
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SIZE = avr-size
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||||||
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AVRDUDE = avrdude
|
||||||
|
|
||||||
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# Microcontroller
|
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MCU = attiny2313
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||||||
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F_CPU = 8000000
|
||||||
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# Fuses -- http://www.engbedded.com/fusecalc/
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LFUSE = 0xdc
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HFUSE = 0x9f
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EFUSE = 0xff
|
||||||
|
|
||||||
|
### GCC options ###
|
||||||
|
|
||||||
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## Compiler flags ##
|
||||||
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# Do not run the linker
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||||||
|
CFLAGS = -c
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||||||
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# Debug informations
|
||||||
|
CFLAGS += -g
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||||||
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# Auto optimisation
|
||||||
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CFLAGS += -Os
|
||||||
|
# All warning messages
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||||||
|
CFLAGS += -Wall
|
||||||
|
# Puts functions and data into its own section - remove thread-safe things
|
||||||
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CFLAGS += -fno-exceptions -ffunction-sections -fdata-sections -fno-threadsafe-statics
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||||||
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# Microcontroller
|
||||||
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CFLAGS += -mmcu=$(MCU)
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||||||
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# Clock speed
|
||||||
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CFLAGS += -DF_CPU=$(F_CPU)L
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||||||
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# Header files
|
||||||
|
CFLAGS += $(addprefix -I,$(INC_DIR))
|
||||||
|
|
||||||
|
## CXX flags are the same as CC ones here!
|
||||||
|
CXXFLAGS = $(CFLAGS)
|
||||||
|
|
||||||
|
# Linker flags
|
||||||
|
LFLAGS = -mmcu=$(MCU)
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||||||
|
LFLAGS += $(addprefix -I,$(INC_DIR))
|
||||||
|
|
||||||
|
######################################################################
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||||||
|
# PROGRAMMING TOOLS #
|
||||||
|
######################################################################
|
||||||
|
# To match MCU with BOARD, see link
|
||||||
|
# http://www.nongnu.org/avr-libc/user-manual/using_tools.html
|
||||||
|
PROGRAMMER = usbasp
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||||||
|
# verbose
|
||||||
|
PROGRAM_FLAGS = -v
|
||||||
|
# choose programmer
|
||||||
|
PROGRAM_FLAGS += -c $(PROGRAMMER)
|
||||||
|
# target cpu
|
||||||
|
PROGRAM_FLAGS += -p $(MCU)
|
||||||
|
|
||||||
|
######################################################################
|
||||||
|
# TARGETS #
|
||||||
|
######################################################################
|
||||||
|
.PHONY: clean
|
||||||
|
|
||||||
|
all: $(OUTPUT_DIR)/$(PROJ_NAME).hex
|
||||||
|
|
||||||
|
# invokes CC compiler before assemblying
|
||||||
|
$(BUILD_DIR)/%.S.o : %.S $(DEPS)
|
||||||
|
@echo -e "\033[1;33m[Assembling ]\033[0m $^"
|
||||||
|
@mkdir -p ${BUILD_DIR}
|
||||||
|
$(CC) $(CFLAGS) $< -o $@
|
||||||
|
|
||||||
|
# pure asm
|
||||||
|
$(BUILD_DIR)/%.s.o : %.s $(DEPS)
|
||||||
|
@echo -e "\033[1;33m[Assembling ]\033[0m $^"
|
||||||
|
@mkdir -p ${BUILD_DIR}
|
||||||
|
$(CC) $(CFLAGS) $< -o $@
|
||||||
|
|
||||||
|
# .cxx files
|
||||||
|
$(BUILD_DIR)/%.cpp.o: %.cpp $(DEPS)
|
||||||
|
@echo -e "\033[1;33m[Compiling ]\033[0m $^"
|
||||||
|
@mkdir -p ${BUILD_DIR}
|
||||||
|
$(CXX) $(CXXFLAGS) $< -o $@
|
||||||
|
|
||||||
|
# .c files
|
||||||
|
$(BUILD_DIR)/%.o: %.c $(DEPS)
|
||||||
|
@echo -e "\033[1;33m[Compiling ]\033[0m $^"
|
||||||
|
@mkdir -p ${BUILD_DIR}
|
||||||
|
$(CC) $(CFLAGS) $< -o $@
|
||||||
|
|
||||||
|
$(OUTPUT_DIR)/$(PROJ_NAME).elf: $(OBJS)
|
||||||
|
@echo -e "\033[1;33m[Linking ]\033[0m $@"
|
||||||
|
@mkdir -p ${OUTPUT_DIR}
|
||||||
|
$(CC) $(LFLAGS) -o $@ $(foreach file, $^, $(file)) -lm
|
||||||
|
@echo -e "\033[1;33m[Disasm... ]\033[0m $^"
|
||||||
|
$(OBJDUMP) -h -S $@ > $(OUTPUT_DIR)/$(PROJ_NAME).lss
|
||||||
|
|
||||||
|
$(OUTPUT_DIR)/$(PROJ_NAME).hex: $(OUTPUT_DIR)/$(PROJ_NAME).elf
|
||||||
|
@echo -e "\033[1;33m[Binary ]\033[0m $^"
|
||||||
|
$(OBJCOPY) -O ihex -R .eeprom $^ $@
|
||||||
|
|
||||||
|
size: $(OUTPUT_DIR)/$(PROJ_NAME).elf
|
||||||
|
$(SIZE) -C --mcu=$(MCU) $(OUTPUT_DIR)/$(PROJ_NAME).elf
|
||||||
|
|
||||||
|
flash: $(OUTPUT_DIR)/$(PROJ_NAME).hex
|
||||||
|
$(AVRDUDE) $(PROGRAM_FLAGS) -U flash:w:$(OUTPUT_DIR)/$(PROJ_NAME).hex
|
||||||
|
|
||||||
|
fuse: $(OUTPUT_DIR)/$(PROJ_NAME).hex
|
||||||
|
$(AVRDUDE) $(PROGRAM_FLAGS) -U lfuse:w:$(LFUSE):m -U hfuse:w:$(HFUSE):m -U efuse:w:$(EFUSE):m
|
||||||
|
|
||||||
|
eeprom: eeprom-vanilla.hex
|
||||||
|
$(AVRDUDE) $(PROGRAM_FLAGS) -U hfuse:w:0xdf:m
|
||||||
|
$(AVRDUDE) $(PROGRAM_FLAGS) -e -U eeprom:w:$^:i
|
||||||
|
$(AVRDUDE) $(PROGRAM_FLAGS) -U hfuse:w:$(HFUSE):m
|
||||||
|
|
||||||
|
|
||||||
|
test:
|
||||||
|
$(AVRDUDE) $(PROGRAM_FLAGS)
|
||||||
|
|
||||||
|
clean:
|
||||||
|
@echo -e "\033[1;33m[Cleaning ]\033[0m"
|
||||||
|
@rm -f $(BUILD_DIR)/*
|
||||||
|
@rm -f $(OUTPUT_DIR)/*
|
|
@ -0,0 +1,20 @@
|
||||||
|
#ifndef GPIO_H_
|
||||||
|
#define GPIO_H_
|
||||||
|
|
||||||
|
#define PIN_PRG_BTN D,4
|
||||||
|
#define PIN_TX_LED B,0
|
||||||
|
#define PIN_RX_LED B,1
|
||||||
|
|
||||||
|
inline void GPIO_init() {
|
||||||
|
DDR(PIN_PRG_BTN) &= ~_BV(PIN(PIN_PRG_BTN));
|
||||||
|
OUT(PIN_PRG_BTN) |= _BV(PIN(PIN_PRG_BTN));
|
||||||
|
DDR(PIN_RX_LED) |= _BV(PIN(PIN_RX_LED));
|
||||||
|
DDR(PIN_TX_LED) |= _BV(PIN(PIN_TX_LED));
|
||||||
|
}
|
||||||
|
|
||||||
|
#define TXLED_ON() (OUT(PIN_TX_LED) |= _BV(PIN(PIN_TX_LED)))
|
||||||
|
#define TXLED_OFF() (OUT(PIN_TX_LED) &= ~_BV(PIN(PIN_TX_LED)))
|
||||||
|
#define RXLED_ON() (OUT(PIN_RX_LED) |= _BV(PIN(PIN_RX_LED)))
|
||||||
|
#define RXLED_OFF() (OUT(PIN_RX_LED) &= ~_BV(PIN(PIN_RX_LED)))
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,27 @@
|
||||||
|
#include "UART.h"
|
||||||
|
#include <avr/io.h>
|
||||||
|
|
||||||
|
const char error[] = "Error\r\n";
|
||||||
|
const char success[] = "Success\r\n";
|
||||||
|
static const char TOHEX[] = "0123456789ABCDEF";
|
||||||
|
|
||||||
|
// UART_init is inline
|
||||||
|
|
||||||
|
void UART_send(const char *str, uint8_t size) {
|
||||||
|
while (*str != '\0' && size != 0) {
|
||||||
|
while (!(UCSRA & _BV(UDRE)))
|
||||||
|
;
|
||||||
|
|
||||||
|
UDR = *str;
|
||||||
|
|
||||||
|
str++;
|
||||||
|
size--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void UART_sendHex(uint8_t *raw, uint8_t size) {
|
||||||
|
for (uint8_t c = 0; c < size; c++) {
|
||||||
|
UART_send(&TOHEX[raw[c] >> 4], 1);
|
||||||
|
UART_send(&TOHEX[raw[c] & 0xf], 1);
|
||||||
|
}
|
||||||
|
}
|
|
@ -0,0 +1,23 @@
|
||||||
|
#ifndef UART_H_
|
||||||
|
#define UART_H_
|
||||||
|
|
||||||
|
// Message constants
|
||||||
|
extern const char error[];
|
||||||
|
extern const char success[];
|
||||||
|
|
||||||
|
inline void UART_init() {
|
||||||
|
// 9600 baud UART
|
||||||
|
UBRRH = 0;
|
||||||
|
UBRRL = 51;
|
||||||
|
|
||||||
|
UCSRB = _BV(RXEN) | _BV(TXEN);
|
||||||
|
}
|
||||||
|
|
||||||
|
void UART_send(const char *str, uint8_t size = 255);
|
||||||
|
void UART_sendHex(uint8_t *raw, uint8_t size);
|
||||||
|
|
||||||
|
// Pseudo-functions
|
||||||
|
#define UART_RXC() (UCSRA & _BV(RXC))
|
||||||
|
#define UART_OF() (UCSRA & _BV(DOR))
|
||||||
|
#define UART_DRE() (UCSRA & _BV(UDRE))
|
||||||
|
#endif
|
|
@ -0,0 +1,103 @@
|
||||||
|
#include "GPIO.h"
|
||||||
|
#include "UART.h"
|
||||||
|
#include "nRF24L01.h"
|
||||||
|
#include "utils.h"
|
||||||
|
#include <avr/io.h>
|
||||||
|
#include <avr/pgmspace.h>
|
||||||
|
#include <util/delay.h>
|
||||||
|
|
||||||
|
static char dataBuffer_rx[RX_PLOAD_WIDTH];
|
||||||
|
static char dataBuffer[TX_PLOAD_WIDTH];
|
||||||
|
static uint8_t dataCnt = 0;
|
||||||
|
|
||||||
|
int main() {
|
||||||
|
_delay_ms(100);
|
||||||
|
|
||||||
|
UART_init();
|
||||||
|
|
||||||
|
NRF24L01_Init();
|
||||||
|
|
||||||
|
GPIO_init();
|
||||||
|
|
||||||
|
while (NRF24L01_Check()) {
|
||||||
|
UART_send(error);
|
||||||
|
_delay_ms(500);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Enter in programming mode
|
||||||
|
if (!(PIND & _BV(4))) {
|
||||||
|
TXLED_ON();
|
||||||
|
RXLED_ON();
|
||||||
|
NRF24L01_UpdateCfg();
|
||||||
|
TXLED_OFF();
|
||||||
|
RXLED_OFF();
|
||||||
|
}
|
||||||
|
|
||||||
|
NRF24L01_SetUp();
|
||||||
|
|
||||||
|
while (1) {
|
||||||
|
char ch;
|
||||||
|
|
||||||
|
// Check if someone is writing on serial
|
||||||
|
if (UART_RXC()) {
|
||||||
|
// Check if buffer overflow
|
||||||
|
if (UART_OF()) {
|
||||||
|
for (uint8_t i = 0; i < dataCnt; i++)
|
||||||
|
dataBuffer[i] = 0;
|
||||||
|
dataCnt = 0;
|
||||||
|
|
||||||
|
// Flush corrupted buffer
|
||||||
|
while (UART_RXC())
|
||||||
|
ch = UDR;
|
||||||
|
} else {
|
||||||
|
ch = UDR;
|
||||||
|
|
||||||
|
if (ch == '\r') {
|
||||||
|
if (dataCnt == 0) {
|
||||||
|
NRF24L01_DumpCfg();
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
// Turn on TX LED
|
||||||
|
TXLED_ON();
|
||||||
|
|
||||||
|
// Temporary set as TX
|
||||||
|
NRF24L01_TX_Mode();
|
||||||
|
|
||||||
|
// Send all data
|
||||||
|
if (NRF24L01_TxPacket((uint8_t *)dataBuffer) != TX_OK)
|
||||||
|
UART_send(error);
|
||||||
|
else
|
||||||
|
UART_send(success);
|
||||||
|
|
||||||
|
// Fallback to RX
|
||||||
|
NRF24L01_RX_Mode();
|
||||||
|
|
||||||
|
for (uint8_t c = 0; c < dataCnt; c++) {
|
||||||
|
while (!UART_DRE())
|
||||||
|
;
|
||||||
|
|
||||||
|
UDR = dataBuffer[c];
|
||||||
|
|
||||||
|
dataBuffer[c] = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
dataCnt = 0;
|
||||||
|
|
||||||
|
// Turn off TX LED
|
||||||
|
TXLED_OFF();
|
||||||
|
} else if (dataCnt < TX_PLOAD_WIDTH) {
|
||||||
|
dataBuffer[dataCnt++] = ch;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if incoming data on nRF is present
|
||||||
|
if (NRF24L01_RxPacket((uint8_t *)dataBuffer_rx) == 0) {
|
||||||
|
RXLED_ON();
|
||||||
|
|
||||||
|
UART_send(dataBuffer_rx, RX_PLOAD_WIDTH);
|
||||||
|
|
||||||
|
RXLED_OFF();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
|
@ -0,0 +1,278 @@
|
||||||
|
#include <avr/io.h>
|
||||||
|
#include <util/delay.h>
|
||||||
|
#include <avr/eeprom.h>
|
||||||
|
#include "nRF24L01.h"
|
||||||
|
#include "UART.h"
|
||||||
|
|
||||||
|
static void SPI_Init() {
|
||||||
|
// Set DO and SCL as output with pullups
|
||||||
|
DDRB |= _BV(PB6); // as output (DO) - data out
|
||||||
|
DDRB |= _BV(PB7); // as output (USISCK) - clock
|
||||||
|
DDRB &= ~_BV(PB5); // as input (DI) - data in
|
||||||
|
PORTB |= _BV(PB5); // pullup on (DI)
|
||||||
|
|
||||||
|
DDR(PIN_SPI_CS) |= _BV(PIN(PIN_SPI_CS));
|
||||||
|
|
||||||
|
SPI_CS_HIGH();
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint8_t SPI_ReadWriteByte(uint8_t dat) {
|
||||||
|
USIDR = dat;
|
||||||
|
|
||||||
|
// Clear Overflow Interrupt Flag
|
||||||
|
USISR = _BV(USIOIF);
|
||||||
|
|
||||||
|
// Do this loop 16times
|
||||||
|
do {
|
||||||
|
// Send clock pulse
|
||||||
|
USICR |= _BV(USITC) | _BV(USIWM0) | _BV(USICS1) | _BV(USICLK);
|
||||||
|
// 100kHz SPI
|
||||||
|
_delay_us(5);
|
||||||
|
} while (!(USISR & _BV(USIOIF)));
|
||||||
|
|
||||||
|
return USIDR;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* NRF24L01_Read_Reg: read an nRF register content
|
||||||
|
* reg: register address
|
||||||
|
* Return value: register's content
|
||||||
|
*/
|
||||||
|
static uint8_t NRF24L01_Read_Reg(uint8_t reg) {
|
||||||
|
uint8_t reg_val;
|
||||||
|
|
||||||
|
SPI_CS_LOW();
|
||||||
|
SPI_ReadWriteByte(reg);
|
||||||
|
reg_val = SPI_ReadWriteByte(0XFF);
|
||||||
|
SPI_CS_HIGH();
|
||||||
|
|
||||||
|
return reg_val;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* NRF24L01_Write_Reg: write an nRF register
|
||||||
|
* reg: register address
|
||||||
|
* value: register value
|
||||||
|
* Return value: status
|
||||||
|
*/
|
||||||
|
static uint8_t NRF24L01_Write_Reg(uint8_t reg, uint8_t value) {
|
||||||
|
uint8_t status;
|
||||||
|
|
||||||
|
SPI_CS_LOW();
|
||||||
|
status = SPI_ReadWriteByte(reg);
|
||||||
|
SPI_ReadWriteByte(value);
|
||||||
|
SPI_CS_HIGH();
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* NRF24L01_Read_Buf: read specified data length at specified nRF address
|
||||||
|
* reg: nRF register location
|
||||||
|
* pBuf: data buffer
|
||||||
|
* len: data length
|
||||||
|
* return value: status register value
|
||||||
|
*/
|
||||||
|
static uint8_t NRF24L01_Read_Buf(uint8_t reg, uint8_t *pBuf, uint8_t len) {
|
||||||
|
uint8_t status;
|
||||||
|
|
||||||
|
SPI_CS_LOW();
|
||||||
|
status = SPI_ReadWriteByte(reg);
|
||||||
|
for (uint8_t c = 0; c < len; c++)
|
||||||
|
pBuf[c] = SPI_ReadWriteByte(0xFF); // gibberish data
|
||||||
|
SPI_CS_HIGH();
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* NRF24L01_Write_Buf: write data buffer to certain nRF address
|
||||||
|
* reg: nRF register location
|
||||||
|
* pBuf: data buffer
|
||||||
|
* len: data length
|
||||||
|
* return value: status register value
|
||||||
|
*/
|
||||||
|
static uint8_t NRF24L01_Write_Buf(uint8_t reg, uint8_t *pBuf, uint8_t len) {
|
||||||
|
uint8_t status;
|
||||||
|
|
||||||
|
SPI_CS_LOW();
|
||||||
|
_delay_us(5);
|
||||||
|
status = SPI_ReadWriteByte(reg);
|
||||||
|
for (uint8_t c = 0; c < len; c++) {
|
||||||
|
SPI_ReadWriteByte(*pBuf++);
|
||||||
|
}
|
||||||
|
_delay_us(5);
|
||||||
|
SPI_CS_HIGH();
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
// NRF24L01 initialisation
|
||||||
|
void NRF24L01_Init() {
|
||||||
|
DDR(PIN_24L01_CE) |= _BV(PIN(PIN_24L01_CE));
|
||||||
|
DDR(PIN_24L01_IRQ) &= ~_BV(PIN(PIN_24L01_IRQ));
|
||||||
|
OUT(PIN_24L01_IRQ) |= _BV(PIN(PIN_24L01_IRQ));
|
||||||
|
|
||||||
|
SPI_Init();
|
||||||
|
|
||||||
|
NRF24L01_CE_LOW();
|
||||||
|
SPI_CS_HIGH();
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check presence of nRF24 module
|
||||||
|
uint8_t NRF24L01_Check() {
|
||||||
|
uint8_t buf[5] = {0xA5, 0xA5, 0xA5, 0xA5, 0xA5};
|
||||||
|
uint8_t i;
|
||||||
|
|
||||||
|
NRF24L01_Write_Buf(NRF_WRITE_REG + TX_ADDR, buf, 5);
|
||||||
|
NRF24L01_Read_Buf(TX_ADDR, buf, 5);
|
||||||
|
for (i = 0; i < 5; i++)
|
||||||
|
if (buf[i] != 0xA5)
|
||||||
|
break;
|
||||||
|
if (i != 5)
|
||||||
|
return 1;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void NRF24L01_SetUp() {
|
||||||
|
// Data buffer containing setting read from EEPROM
|
||||||
|
uint8_t eebuffer[7];
|
||||||
|
|
||||||
|
NRF24L01_CE_LOW();
|
||||||
|
|
||||||
|
eeprom_read_block(eebuffer, (const void*)0, 7);
|
||||||
|
for (uint8_t i = 0; i < 7; i++)
|
||||||
|
NRF24L01_Write_Reg(NRF_WRITE_REG + CONFIG + i, eebuffer[i]); // Enable CRC, 16-bit wide
|
||||||
|
|
||||||
|
// Set RX address 0
|
||||||
|
eeprom_read_block(eebuffer, (const void*)7, RX_ADR_WIDTH);
|
||||||
|
//UART_sendHex(eebuffer, 5);
|
||||||
|
NRF24L01_Write_Buf(NRF_WRITE_REG + RX_ADDR_P0, eebuffer, RX_ADR_WIDTH);
|
||||||
|
// Set RX address 1
|
||||||
|
eeprom_read_block(eebuffer, (const void*)12, RX_ADR_WIDTH);
|
||||||
|
//UART_sendHex(eebuffer, 5);
|
||||||
|
NRF24L01_Write_Buf(NRF_WRITE_REG + RX_ADDR_P1, eebuffer, RX_ADR_WIDTH);
|
||||||
|
// Set RX address 2-5
|
||||||
|
eeprom_read_block(eebuffer, (const void*)17, 4);
|
||||||
|
//UART_sendHex(eebuffer, 4);
|
||||||
|
for (uint8_t i = 0; i < 4; i++)
|
||||||
|
NRF24L01_Write_Reg(NRF_WRITE_REG + RX_ADDR_P2 + i, eebuffer[i]);
|
||||||
|
|
||||||
|
// Set TX address
|
||||||
|
eeprom_read_block(eebuffer, (const void*)21, TX_ADR_WIDTH);
|
||||||
|
//UART_sendHex(eebuffer, 5);
|
||||||
|
NRF24L01_Write_Buf(NRF_WRITE_REG + TX_ADDR, eebuffer, TX_ADR_WIDTH);
|
||||||
|
|
||||||
|
// Set RX_ADDR_P*
|
||||||
|
eeprom_read_block(eebuffer, (const void*)26, 6);
|
||||||
|
//UART_sendHex(eebuffer, 6);
|
||||||
|
for (uint8_t i = 0; i < 6; i++)
|
||||||
|
NRF24L01_Write_Reg(NRF_WRITE_REG + RX_PW_P0 + i, eebuffer[i]);
|
||||||
|
|
||||||
|
NRF24L01_CE_HIGH();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* NRF24L01_TxPacket: send data packet with nRF24
|
||||||
|
* txbuf: address of first byte to send
|
||||||
|
* Return value: send completion status
|
||||||
|
*/
|
||||||
|
uint8_t NRF24L01_TxPacket(uint8_t *txbuf) {
|
||||||
|
uint8_t status;
|
||||||
|
|
||||||
|
NRF24L01_CE_LOW();
|
||||||
|
NRF24L01_Write_Buf(WR_TX_PLOAD, txbuf, TX_PLOAD_WIDTH);
|
||||||
|
NRF24L01_CE_HIGH();
|
||||||
|
|
||||||
|
while (NRF24L01_IRQ() != 0)
|
||||||
|
;
|
||||||
|
|
||||||
|
status = NRF24L01_Read_Reg(STATUS);
|
||||||
|
NRF24L01_Write_Reg(NRF_WRITE_REG + STATUS, status);
|
||||||
|
|
||||||
|
// Maximum number of retransmission reached
|
||||||
|
if (status & MAX_TX) {
|
||||||
|
NRF24L01_Write_Reg(FLUSH_TX, 0xff);
|
||||||
|
return MAX_TX;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (status & TX_OK)
|
||||||
|
return TX_OK;
|
||||||
|
|
||||||
|
return 0xff;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* NRF24L01_RxPacket: receive data packet with nRF24
|
||||||
|
* rxbuf: address of first byte of receive data buffer
|
||||||
|
* Return value: 0 if success, 1 if no data present
|
||||||
|
*/
|
||||||
|
uint8_t NRF24L01_RxPacket(uint8_t *rxbuf) {
|
||||||
|
uint8_t status;
|
||||||
|
|
||||||
|
status = NRF24L01_Read_Reg(STATUS);
|
||||||
|
NRF24L01_Write_Reg(NRF_WRITE_REG + STATUS, status);
|
||||||
|
if (status & RX_OK) {
|
||||||
|
NRF24L01_Read_Buf(RD_RX_PLOAD, rxbuf, RX_PLOAD_WIDTH);
|
||||||
|
NRF24L01_Write_Reg(FLUSH_RX, 0xff);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
void NRF24L01_RX_Mode() {
|
||||||
|
uint8_t cfg;
|
||||||
|
cfg = NRF24L01_Read_Reg(NRF_READ_REG + CONFIG);
|
||||||
|
NRF24L01_CE_LOW();
|
||||||
|
NRF24L01_Write_Reg(NRF_WRITE_REG + CONFIG, cfg | _BV(0));
|
||||||
|
NRF24L01_CE_HIGH();
|
||||||
|
}
|
||||||
|
|
||||||
|
void NRF24L01_TX_Mode() {
|
||||||
|
uint8_t cfg;
|
||||||
|
cfg = NRF24L01_Read_Reg(NRF_READ_REG + CONFIG);
|
||||||
|
NRF24L01_CE_LOW();
|
||||||
|
NRF24L01_Write_Reg(NRF_WRITE_REG + CONFIG, cfg & ~_BV(0));
|
||||||
|
NRF24L01_CE_HIGH();
|
||||||
|
}
|
||||||
|
|
||||||
|
void NRF24L01_DumpCfg() {
|
||||||
|
uint8_t eebuffer[7];
|
||||||
|
|
||||||
|
for (uint8_t i = 0; i < 7; i++)
|
||||||
|
eebuffer[i] = NRF24L01_Read_Reg(NRF_READ_REG + CONFIG + i); // Enable CRC, 16-bit wide
|
||||||
|
UART_sendHex(eebuffer, 7);
|
||||||
|
|
||||||
|
NRF24L01_Read_Buf(NRF_READ_REG + RX_ADDR_P0, eebuffer, RX_ADR_WIDTH);
|
||||||
|
UART_sendHex(eebuffer, 5);
|
||||||
|
|
||||||
|
NRF24L01_Read_Buf(NRF_READ_REG + RX_ADDR_P1, eebuffer, RX_ADR_WIDTH);
|
||||||
|
UART_sendHex(eebuffer, 5);
|
||||||
|
|
||||||
|
for (uint8_t i = 0; i < 4; i++)
|
||||||
|
eebuffer[i] = NRF24L01_Read_Reg(NRF_READ_REG + RX_ADDR_P2 + i);
|
||||||
|
UART_sendHex(eebuffer, 4);
|
||||||
|
|
||||||
|
|
||||||
|
NRF24L01_Read_Buf(NRF_READ_REG + TX_ADDR, eebuffer, TX_ADR_WIDTH);
|
||||||
|
UART_sendHex(eebuffer, 5);
|
||||||
|
|
||||||
|
for (uint8_t i = 0; i < 6; i++)
|
||||||
|
eebuffer[i] = NRF24L01_Read_Reg(NRF_READ_REG + RX_PW_P0 + i);
|
||||||
|
UART_sendHex(eebuffer, 6);
|
||||||
|
}
|
||||||
|
|
||||||
|
void NRF24L01_UpdateCfg() {
|
||||||
|
// flush previous data
|
||||||
|
while (UART_RXC())
|
||||||
|
uint8_t tmp = UDR;
|
||||||
|
|
||||||
|
for (uint8_t* i = 0; i < (const uint8_t*)32; i++) {
|
||||||
|
uint8_t data;
|
||||||
|
// send ready to receive
|
||||||
|
UDR = (int)i;
|
||||||
|
|
||||||
|
// wait for data
|
||||||
|
while (!UART_RXC())
|
||||||
|
;
|
||||||
|
|
||||||
|
data = UDR;
|
||||||
|
eeprom_update_byte(i, data);
|
||||||
|
}
|
||||||
|
}
|
|
@ -0,0 +1,75 @@
|
||||||
|
#ifndef __24L01_H
|
||||||
|
#define __24L01_H
|
||||||
|
#include "utils.h"
|
||||||
|
|
||||||
|
#define PIN_SPI_CS B,3 // CSN
|
||||||
|
#define PIN_24L01_CE B,4 // CE
|
||||||
|
|
||||||
|
#define PIN_24L01_IRQ B,2
|
||||||
|
|
||||||
|
#define SPI_CS_HIGH() (OUT(PIN_SPI_CS) |= _BV(PIN(PIN_SPI_CS)))
|
||||||
|
#define SPI_CS_LOW() (OUT(PIN_SPI_CS) &= ~_BV(PIN(PIN_SPI_CS)))
|
||||||
|
|
||||||
|
#define NRF24L01_CE_HIGH() (OUT(PIN_24L01_CE) |= _BV(PIN(PIN_24L01_CE)))
|
||||||
|
#define NRF24L01_CE_LOW() (OUT(PIN_24L01_CE) &= ~_BV(PIN(PIN_24L01_CE)))
|
||||||
|
|
||||||
|
#define NRF24L01_IRQ() (IN(PIN_24L01_IRQ) & _BV(PIN(PIN_24L01_IRQ)))
|
||||||
|
|
||||||
|
// Commands
|
||||||
|
#define NRF_READ_REG 0x00 // Read register. lower 5 bits are register address
|
||||||
|
#define NRF_WRITE_REG 0x20 // Write register. lower 5 bits are register address
|
||||||
|
#define RD_RX_PLOAD 0x61 // Read RX data
|
||||||
|
#define WR_TX_PLOAD 0xA0 // Write TX data
|
||||||
|
#define FLUSH_TX 0xE1 // Clear FIFO TX register
|
||||||
|
#define FLUSH_RX 0xE2 // Clear FIFO RX register
|
||||||
|
#define REUSE_TX_PL 0xE3 // Reuse previous packet
|
||||||
|
#define NOP 0xFF // Null operation (read status register)
|
||||||
|
|
||||||
|
// Register Addresses
|
||||||
|
#define CONFIG 0x00 // Configure register
|
||||||
|
#define EN_AA 0x01 // Enable automatic answer function
|
||||||
|
#define EN_RXADDR 0x02 // Enable receive address
|
||||||
|
#define SETUP_AW 0x03 // Setup address width
|
||||||
|
#define SETUP_RETR 0x04 // Automatic retransmission
|
||||||
|
#define RF_CH 0x05 // Set channel frequency
|
||||||
|
#define RF_SETUP 0x06 // Set transmission rate, LNA gain, transmit power
|
||||||
|
#define STATUS 0x07 // Status register
|
||||||
|
#define OBSERVE_TX 0x08 // Transmission detection
|
||||||
|
#define CD 0x09 // Carrier detection
|
||||||
|
#define RX_ADDR_P0 0x0A // RX address for data channel 0
|
||||||
|
#define RX_ADDR_P1 0x0B // RX address for data channel 1
|
||||||
|
#define RX_ADDR_P2 0x0C // RX address for data channel 2
|
||||||
|
#define RX_ADDR_P3 0x0D // RX address for data channel 3
|
||||||
|
#define RX_ADDR_P4 0x0E // RX address for data channel 4
|
||||||
|
#define RX_ADDR_P5 0x0F // RX address for data channel 5
|
||||||
|
#define TX_ADDR 0x10 // TX address
|
||||||
|
#define RX_PW_P0 0x11 // RX data for channel 0
|
||||||
|
#define RX_PW_P1 0x12 // RX data for channel 1
|
||||||
|
#define RX_PW_P2 0x13 // RX data for channel 2
|
||||||
|
#define RX_PW_P3 0x14 // RX data for channel 3
|
||||||
|
#define RX_PW_P4 0x15 // RX data for channel 4
|
||||||
|
#define RX_PW_P5 0x16 // RX data for channel 5
|
||||||
|
#define NRF_FIFO_STATUS 0x17 // FIFO status register
|
||||||
|
|
||||||
|
// Return values
|
||||||
|
enum {
|
||||||
|
MAX_TX = 0x10,
|
||||||
|
TX_OK = 0x20,
|
||||||
|
RX_OK = 0x40
|
||||||
|
};
|
||||||
|
|
||||||
|
#define TX_ADR_WIDTH 5
|
||||||
|
#define RX_ADR_WIDTH 5
|
||||||
|
#define TX_PLOAD_WIDTH 32
|
||||||
|
#define RX_PLOAD_WIDTH 32
|
||||||
|
|
||||||
|
void NRF24L01_Init(void);
|
||||||
|
void NRF24L01_SetUp(void);
|
||||||
|
void NRF24L01_RX_Mode(void);
|
||||||
|
void NRF24L01_TX_Mode(void);
|
||||||
|
uint8_t NRF24L01_Check(void);
|
||||||
|
uint8_t NRF24L01_TxPacket(uint8_t *txbuf);
|
||||||
|
uint8_t NRF24L01_RxPacket(uint8_t *rxbuf);
|
||||||
|
void NRF24L01_DumpCfg(void);
|
||||||
|
void NRF24L01_UpdateCfg(void);
|
||||||
|
#endif
|
|
@ -0,0 +1,25 @@
|
||||||
|
#ifndef UTILS_H_
|
||||||
|
#define UTILS_H_
|
||||||
|
|
||||||
|
/* Macros for bit management */
|
||||||
|
#define low(x) ((x)&0xFF)
|
||||||
|
#define high(x) ((x >> 8) & 0xFF)
|
||||||
|
|
||||||
|
#define _BS16(x) __builtin_bswap16(x)
|
||||||
|
|
||||||
|
/* Macros for port management */
|
||||||
|
#define xCAT2(a, b) a##b
|
||||||
|
#define CAT2(a, b) xCAT2(a, b)
|
||||||
|
|
||||||
|
#define xCAT3(a, b, c) a##b##c
|
||||||
|
#define CAT3(a, b, c) xCAT3(a, b, c)
|
||||||
|
|
||||||
|
#define CAT_PORT(a, b, c) xCAT2(a, b)
|
||||||
|
#define OUT(a) (CAT_PORT(PORT, a))
|
||||||
|
#define DDR(a) (CAT_PORT(DDR, a))
|
||||||
|
#define IN(a) (CAT_PORT(PIN, a))
|
||||||
|
|
||||||
|
#define CAT_PIN(a, b) b
|
||||||
|
#define PIN(a) (CAT_PIN(a))
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,412 @@
|
||||||
|
EESchema-LIBRARY Version 2.4
|
||||||
|
#encoding utf-8
|
||||||
|
#
|
||||||
|
# Connector_AVR-ISP-6
|
||||||
|
#
|
||||||
|
DEF Connector_AVR-ISP-6 J 0 40 Y Y 1 F N
|
||||||
|
F0 "J" 0 400 50 H V L CNN
|
||||||
|
F1 "Connector_AVR-ISP-6" 0 -300 50 H V L CNN
|
||||||
|
F2 "" -250 50 50 V I C CNN
|
||||||
|
F3 "" -1275 -550 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
IDC?Header*2x03*
|
||||||
|
Pin?Header*2x03*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
S -105 -220 -95 -250 0 1 0 N
|
||||||
|
S -105 350 -95 320 0 1 0 N
|
||||||
|
S 250 -95 220 -105 0 1 0 N
|
||||||
|
S 250 5 220 -5 0 1 0 N
|
||||||
|
S 250 105 220 95 0 1 0 N
|
||||||
|
S 250 205 220 195 0 1 0 N
|
||||||
|
S 250 350 -250 -250 0 1 10 f
|
||||||
|
X MISO 1 400 200 150 L 50 50 1 1 P
|
||||||
|
X VCC 2 -100 500 150 D 50 50 1 1 W
|
||||||
|
X SCK 3 400 0 150 L 50 50 1 1 P
|
||||||
|
X MOSI 4 400 100 150 L 50 50 1 1 P
|
||||||
|
X ~RST 5 400 -100 150 L 50 50 1 1 P
|
||||||
|
X GND 6 -100 -400 150 U 50 50 1 1 W
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Connector_TestPoint
|
||||||
|
#
|
||||||
|
DEF Connector_TestPoint TP 0 30 N N 1 F N
|
||||||
|
F0 "TP" 0 270 50 H V C CNN
|
||||||
|
F1 "Connector_TestPoint" 0 200 50 H V C CNN
|
||||||
|
F2 "" 200 0 50 H I C CNN
|
||||||
|
F3 "" 200 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
Pin*
|
||||||
|
Test*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
C 0 130 30 0 1 0 N
|
||||||
|
X 1 1 0 0 100 U 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Connector_USB_A
|
||||||
|
#
|
||||||
|
DEF Connector_USB_A J 0 40 Y Y 1 F N
|
||||||
|
F0 "J" -200 450 50 H V L CNN
|
||||||
|
F1 "Connector_USB_A" -200 350 50 H V L CNN
|
||||||
|
F2 "" 150 -50 50 H I C CNN
|
||||||
|
F3 "" 150 -50 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
USB*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
C -150 85 25 0 1 10 F
|
||||||
|
C -25 135 15 0 1 10 F
|
||||||
|
S -200 -300 200 300 0 1 10 f
|
||||||
|
S -60 190 -170 210 0 1 0 F
|
||||||
|
S -50 180 -180 230 0 1 0 N
|
||||||
|
S -5 -300 5 -270 0 1 0 N
|
||||||
|
S 10 50 -20 20 0 1 10 F
|
||||||
|
S 200 -105 170 -95 0 1 0 N
|
||||||
|
S 200 -5 170 5 0 1 0 N
|
||||||
|
S 200 195 170 205 0 1 0 N
|
||||||
|
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
|
||||||
|
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
|
||||||
|
P 4 0 1 10 25 110 25 60 75 85 25 110 F
|
||||||
|
P 2 1 1 10 -75 85 25 85 N
|
||||||
|
X VBUS 1 300 200 100 L 50 50 1 1 W
|
||||||
|
X D- 2 300 -100 100 L 50 50 1 1 P
|
||||||
|
X D+ 3 300 0 100 L 50 50 1 1 P
|
||||||
|
X GND 4 0 -400 100 U 50 50 1 1 W
|
||||||
|
X Shield 5 -100 -400 100 U 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Device_C
|
||||||
|
#
|
||||||
|
DEF Device_C C 0 10 N Y 1 F N
|
||||||
|
F0 "C" 25 100 50 H V L CNN
|
||||||
|
F1 "Device_C" 25 -100 50 H V L CNN
|
||||||
|
F2 "" 38 -150 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
C_*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
P 2 0 1 20 -80 -30 80 -30 N
|
||||||
|
P 2 0 1 20 -80 30 80 30 N
|
||||||
|
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||||
|
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Device_CP
|
||||||
|
#
|
||||||
|
DEF Device_CP C 0 10 N Y 1 F N
|
||||||
|
F0 "C" 25 100 50 H V L CNN
|
||||||
|
F1 "Device_CP" 25 -100 50 H V L CNN
|
||||||
|
F2 "" 38 -150 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
CP_*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
S -90 20 -90 40 0 1 0 N
|
||||||
|
S -90 20 90 20 0 1 0 N
|
||||||
|
S 90 -20 -90 -40 0 1 0 F
|
||||||
|
S 90 40 -90 40 0 1 0 N
|
||||||
|
S 90 40 90 20 0 1 0 N
|
||||||
|
P 2 0 1 0 -70 90 -30 90 N
|
||||||
|
P 2 0 1 0 -50 110 -50 70 N
|
||||||
|
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||||
|
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Device_Crystal_GND24
|
||||||
|
#
|
||||||
|
DEF Device_Crystal_GND24 Y 0 40 Y N 1 F N
|
||||||
|
F0 "Y" 125 200 50 H V L CNN
|
||||||
|
F1 "Device_Crystal_GND24" 125 125 50 H V L CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
Crystal*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
S -45 100 45 -100 0 1 12 N
|
||||||
|
P 2 0 1 0 -100 0 -80 0 N
|
||||||
|
P 2 0 1 20 -80 -50 -80 50 N
|
||||||
|
P 2 0 1 0 0 -150 0 -140 N
|
||||||
|
P 2 0 1 0 0 140 0 150 N
|
||||||
|
P 2 0 1 20 80 -50 80 50 N
|
||||||
|
P 2 0 1 0 80 0 100 0 N
|
||||||
|
P 4 0 1 0 -100 -90 -100 -140 100 -140 100 -90 N
|
||||||
|
P 4 0 1 0 -100 90 -100 140 100 140 100 90 N
|
||||||
|
X 1 1 -150 0 50 R 50 50 1 1 P
|
||||||
|
X 2 2 0 200 50 D 50 50 1 1 P
|
||||||
|
X 3 3 150 0 50 L 50 50 1 1 P
|
||||||
|
X 4 4 0 -200 50 U 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Device_LED
|
||||||
|
#
|
||||||
|
DEF Device_LED D 0 40 N N 1 F N
|
||||||
|
F0 "D" 0 100 50 H V C CNN
|
||||||
|
F1 "Device_LED" 0 -100 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
LED*
|
||||||
|
LED_SMD:*
|
||||||
|
LED_THT:*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
P 2 0 1 8 -50 -50 -50 50 N
|
||||||
|
P 2 0 1 0 -50 0 50 0 N
|
||||||
|
P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N
|
||||||
|
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
|
||||||
|
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
|
||||||
|
X K 1 -150 0 100 R 50 50 1 1 P
|
||||||
|
X A 2 150 0 100 L 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Device_R
|
||||||
|
#
|
||||||
|
DEF Device_R R 0 0 N Y 1 F N
|
||||||
|
F0 "R" 80 0 50 V V C CNN
|
||||||
|
F1 "Device_R" 0 0 50 V V C CNN
|
||||||
|
F2 "" -70 0 50 V I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
R_*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
S -40 -100 40 100 0 1 10 N
|
||||||
|
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||||
|
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Graphic_Logo_Open_Hardware_Small
|
||||||
|
#
|
||||||
|
DEF ~Graphic_Logo_Open_Hardware_Small #LOGO 0 40 Y Y 1 F N
|
||||||
|
F0 "#LOGO" 0 275 50 H I C CNN
|
||||||
|
F1 "Graphic_Logo_Open_Hardware_Small" 0 -225 50 H I C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
P 277 0 1 0 132 -171 130 -170 125 -167 118 -162 109 -156 100 -150 93 -146 88 -142 86 -141 85 -142 81 -144 75 -147 71 -149 66 -151 63 -151 63 -151 61 -147 58 -139 53 -130 49 -119 44 -107 38 -95 34 -83 29 -72 26 -64 24 -58 23 -55 23 -55 26 -52 31 -49 41 -40 51 -27 57 -13 60 3 58 18 52 32 42 45 30 54 16 60 0 62 -15 61 -29 55 -42 45 -48 39 -55 26 -60 12 -60 9 -59 -7 -55 -21 -47 -34 -36 -45 -34 -46 -29 -50 -25 -53 -23 -55 -42 -102 -45 -110 -51 -123 -55 -134 -59 -143 -62 -149 -63 -151 -63 -151 -65 -151 -68 -150 -75 -147 -79 -145 -84 -142 -87 -141 -89 -142 -93 -145 -100 -150 -109 -156 -117 -161 -124 -166 -130 -170 -132 -171 -133 -171 -135 -170 -139 -166 -146 -160 -155 -151 -156 -150 -164 -142 -170 -136 -174 -131 -175 -129 -175 -129 -174 -127 -170 -121 -166 -114 -160 -105 -144 -82 -153 -61 -155 -54 -159 -46 -161 -41 -162 -38 -165 -37 -170 -36 -179 -34 -189 -32 -199 -31 -207 -29 -214 -28 -217 -27 -217 -27 -218 -25 -218 -22 -218 -17 -219 -9 -219 3 -219 5 -218 16 -218 25 -218 30 -218 33 -218 33 -215 33 -209 35 -200 36 -190 38 -189 39 -179 41 -170 42 -164 44 -161 45 -161 45 -159 49 -156 56 -152 64 -149 72 -146 79 -144 85 -143 87 -143 87 -145 90 -148 95 -153 102 -160 111 -160 112 -166 121 -171 128 -174 133 -175 136 -175 136 -173 138 -169 143 -162 150 -155 158 -152 160 -144 169 -138 174 -134 177 -132 178 -132 178 -130 176 -124 172 -117 167 -108 161 -107 161 -98 155 -91 150 -86 146 -84 145 -83 145 -80 146 -73 148 -66 151 -58 155 -50 158 -45 160 -42 162 -42 162 -41 165 -40 171 -38 180 -36 191 -35 193 -33 203 -32 212 -31 218 -30 220 -28 221 -23 221 -16 221 -6 221 3 221 13 221 21 221 27 220 29 220 29 220 30 217 32 210 33 201 36 190 36 188 38 178 40 169 41 163 42 161 42 161 47 159 54 156 62 152 82 144 107 161 109 163 118 169 125 174 130 177 133 178 133 178 135 176 140 171 147 165 154 157 160 151 167 144 171 140 174 137 174 135 174 134 173 131 169 126 164 118 158 110 153 102 148 94 144 88 143 85 143 84 145 79 148 72 152 63 160 44 173 41 181 40 192 38 202 36 218 33 219 -26 216 -27 214 -27 208 -29 199 -30 189 -32 181 -34 172 -36 166 -37 163 -37 162 -38 160 -42 157 -49 154 -57 150 -65 147 -73 145 -79 144 -82 145 -84 149 -89 153 -97 159 -105 165 -114 170 -121 173 -126 175 -129 174 -131 171 -135 164 -141 155 -151 153 -152 145 -160 139 -166 134 -170 132 -171 F
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Interface_USB_CH340G
|
||||||
|
#
|
||||||
|
DEF Interface_USB_CH340G U 0 20 Y Y 1 F N
|
||||||
|
F0 "U" -200 550 50 H V R CNN
|
||||||
|
F1 "Interface_USB_CH340G" 50 550 50 H V L CNN
|
||||||
|
F2 "Package_SO:SOIC-16_3.9x9.9mm_P1.27mm" 50 -550 50 H I L CNN
|
||||||
|
F3 "" -350 800 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
SOIC*3.9x9.9mm*P1.27mm*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
S -300 500 300 -500 0 1 10 f
|
||||||
|
X GND 1 0 -600 100 U 50 50 1 1 W
|
||||||
|
X ~DSR 10 400 0 100 L 50 50 1 1 I
|
||||||
|
X ~RI 11 400 -100 100 L 50 50 1 1 I
|
||||||
|
X ~DCD 12 400 -200 100 L 50 50 1 1 I
|
||||||
|
X ~DTR 13 400 -300 100 L 50 50 1 1 O
|
||||||
|
X ~RTS 14 400 -400 100 L 50 50 1 1 O
|
||||||
|
X R232 15 -400 300 100 R 50 50 1 1 I
|
||||||
|
X VCC 16 0 600 100 D 50 50 1 1 W
|
||||||
|
X TXD 2 400 400 100 L 50 50 1 1 O
|
||||||
|
X RXD 3 400 300 100 L 50 50 1 1 I
|
||||||
|
X V3 4 -100 600 100 D 50 50 1 1 P
|
||||||
|
X UD+ 5 -400 100 100 R 50 50 1 1 B
|
||||||
|
X UD- 6 -400 0 100 R 50 50 1 1 B
|
||||||
|
X XI 7 -400 -200 100 R 50 50 1 1 I
|
||||||
|
X XO 8 -400 -400 100 R 50 50 1 1 O
|
||||||
|
X ~CTS 9 400 100 100 L 50 50 1 1 I
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Jumper_SolderJumper_3_Bridged12
|
||||||
|
#
|
||||||
|
DEF Jumper_SolderJumper_3_Bridged12 JP 0 0 Y N 1 F N
|
||||||
|
F0 "JP" -100 -100 50 H V C CNN
|
||||||
|
F1 "Jumper_SolderJumper_3_Bridged12" 0 110 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
$FPLIST
|
||||||
|
SolderJumper*Bridged12*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
A -40 0 40 901 -901 0 1 0 N -40 40 -40 -40
|
||||||
|
A -40 0 40 901 -901 0 1 0 F -40 40 -40 -40
|
||||||
|
A 40 0 40 -899 899 0 1 0 N 40 -40 40 40
|
||||||
|
A 40 0 40 -899 899 0 1 0 F 40 -40 40 40
|
||||||
|
S -40 20 -20 -20 0 1 0 F
|
||||||
|
S -20 40 20 -40 0 1 0 F
|
||||||
|
P 2 0 1 0 -100 0 -80 0 N
|
||||||
|
P 2 0 1 0 -40 40 -40 -40 N
|
||||||
|
P 2 0 1 0 0 -50 0 -40 N
|
||||||
|
P 2 0 1 0 40 40 40 -40 N
|
||||||
|
P 2 0 1 0 100 0 80 0 N
|
||||||
|
X A 1 -200 0 100 R 50 50 1 1 P
|
||||||
|
X C 2 0 -150 100 U 50 50 1 1 I
|
||||||
|
X B 3 200 0 100 L 50 50 1 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# MCU_Microchip_ATtiny_ATtiny2313A-SU
|
||||||
|
#
|
||||||
|
DEF MCU_Microchip_ATtiny_ATtiny2313A-SU U 0 20 Y Y 1 F N
|
||||||
|
F0 "U" -500 1050 50 H V L BNN
|
||||||
|
F1 "MCU_Microchip_ATtiny_ATtiny2313A-SU" 100 -1050 50 H V L TNN
|
||||||
|
F2 "Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm" 0 0 50 H I C CIN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
ALIAS ATtiny2313-20SU ATtiny2313A-SU ATtiny4313-SU
|
||||||
|
$FPLIST
|
||||||
|
SOIC*7.5x12.8mm*P1.27mm*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
S -500 -1000 500 1000 0 1 10 f
|
||||||
|
X PA2/~RESET 1 -600 800 100 R 50 50 1 1 T
|
||||||
|
X GND 10 0 -1100 100 U 50 50 1 1 W
|
||||||
|
X PD6 11 600 -700 100 L 50 50 1 1 T
|
||||||
|
X PB0 12 600 800 100 L 50 50 1 1 T
|
||||||
|
X PB1 13 600 700 100 L 50 50 1 1 T
|
||||||
|
X PB2 14 600 600 100 L 50 50 1 1 T
|
||||||
|
X PB3 15 600 500 100 L 50 50 1 1 T
|
||||||
|
X PB4 16 600 400 100 L 50 50 1 1 T
|
||||||
|
X PB5 17 600 300 100 L 50 50 1 1 T
|
||||||
|
X PB6 18 600 200 100 L 50 50 1 1 T
|
||||||
|
X PB7 19 600 100 100 L 50 50 1 1 T
|
||||||
|
X PD0 2 600 -100 100 L 50 50 1 1 T
|
||||||
|
X VCC 20 0 1100 100 D 50 50 1 1 W
|
||||||
|
X PD1 3 600 -200 100 L 50 50 1 1 T
|
||||||
|
X PA1/XTAL2 4 -600 400 100 R 50 50 1 1 T
|
||||||
|
X PA0/XTAL1 5 -600 600 100 R 50 50 1 1 T
|
||||||
|
X PD2 6 600 -300 100 L 50 50 1 1 T
|
||||||
|
X PD3 7 600 -400 100 L 50 50 1 1 T
|
||||||
|
X PD4 8 600 -500 100 L 50 50 1 1 T
|
||||||
|
X PD5 9 600 -600 100 L 50 50 1 1 T
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Regulator_Linear_MCP1700-3302E_SOT23
|
||||||
|
#
|
||||||
|
DEF Regulator_Linear_MCP1700-3302E_SOT23 U 0 10 Y Y 1 F N
|
||||||
|
F0 "U" -150 125 50 H V C CNN
|
||||||
|
F1 "Regulator_Linear_MCP1700-3302E_SOT23" 0 125 50 H V L CNN
|
||||||
|
F2 "Package_TO_SOT_SMD:SOT-23" 0 225 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
ALIAS MCP1700-1202E_SOT23 MCP1700-1802E_SOT23 MCP1700-2502E_SOT23 MCP1700-2802E_SOT23 MCP1700-3302E_SOT23 MCP1700-5002E_SOT23
|
||||||
|
$FPLIST
|
||||||
|
SOT?23*
|
||||||
|
$ENDFPLIST
|
||||||
|
DRAW
|
||||||
|
S -200 75 200 -200 0 1 10 f
|
||||||
|
X GND 1 0 -300 100 U 50 50 1 1 W
|
||||||
|
X VO 2 300 0 100 L 50 50 1 1 w
|
||||||
|
X VI 3 -300 0 100 R 50 50 1 1 W
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# Switch_SW_Push
|
||||||
|
#
|
||||||
|
DEF Switch_SW_Push SW 0 40 N N 1 F N
|
||||||
|
F0 "SW" 50 100 50 H V L CNN
|
||||||
|
F1 "Switch_SW_Push" 0 -60 50 H V C CNN
|
||||||
|
F2 "" 0 200 50 H I C CNN
|
||||||
|
F3 "" 0 200 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
C -80 0 20 0 1 0 N
|
||||||
|
C 80 0 20 0 1 0 N
|
||||||
|
P 2 0 1 0 0 50 0 120 N
|
||||||
|
P 2 0 1 0 100 50 -100 50 N
|
||||||
|
X 1 1 -200 0 100 R 50 50 0 1 P
|
||||||
|
X 2 2 200 0 100 L 50 50 0 1 P
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# _wireless_NRF24L01+_SHIELD
|
||||||
|
#
|
||||||
|
DEF _wireless_NRF24L01+_SHIELD U 0 40 Y Y 1 F N
|
||||||
|
F0 "U" 0 -250 50 H V C CNN
|
||||||
|
F1 "_wireless_NRF24L01+_SHIELD" 0 400 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
S -200 -200 200 350 0 1 0 f
|
||||||
|
X VCC 1 -300 250 100 R 47 47 1 1 W
|
||||||
|
X GND 10 300 -150 100 L 47 47 1 1 W
|
||||||
|
X VCC 2 300 250 100 L 47 47 1 1 W
|
||||||
|
X ~CE~ 3 -300 150 100 R 47 47 1 1 I
|
||||||
|
X ~CSN~ 4 300 150 100 L 47 47 1 1 I
|
||||||
|
X SCK 5 -300 50 100 R 47 47 1 1 I
|
||||||
|
X MOSI 6 300 50 100 L 47 47 1 1 I
|
||||||
|
X MISO 7 -300 -50 100 R 47 47 1 1 O
|
||||||
|
X IRQ 8 300 -50 100 L 47 47 1 1 I
|
||||||
|
X GND 9 -300 -150 100 R 47 47 1 1 W
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# power_+3.3V
|
||||||
|
#
|
||||||
|
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||||
|
F0 "#PWR" 0 -150 50 H I C CNN
|
||||||
|
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
ALIAS +3.3V
|
||||||
|
DRAW
|
||||||
|
P 2 0 1 0 -30 50 0 100 N
|
||||||
|
P 2 0 1 0 0 0 0 100 N
|
||||||
|
P 2 0 1 0 0 100 30 50 N
|
||||||
|
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# power_+5V
|
||||||
|
#
|
||||||
|
DEF power_+5V #PWR 0 0 Y Y 1 F P
|
||||||
|
F0 "#PWR" 0 -150 50 H I C CNN
|
||||||
|
F1 "power_+5V" 0 140 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
P 2 0 1 0 -30 50 0 100 N
|
||||||
|
P 2 0 1 0 0 0 0 100 N
|
||||||
|
P 2 0 1 0 0 100 30 50 N
|
||||||
|
X +5V 1 0 0 0 U 50 50 1 1 W N
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# power_GND
|
||||||
|
#
|
||||||
|
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||||
|
F0 "#PWR" 0 -250 50 H I C CNN
|
||||||
|
F1 "power_GND" 0 -150 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||||
|
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
# power_PWR_FLAG
|
||||||
|
#
|
||||||
|
DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
|
||||||
|
F0 "#FLG" 0 75 50 H I C CNN
|
||||||
|
F1 "power_PWR_FLAG" 0 150 50 H V C CNN
|
||||||
|
F2 "" 0 0 50 H I C CNN
|
||||||
|
F3 "" 0 0 50 H I C CNN
|
||||||
|
DRAW
|
||||||
|
P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
|
||||||
|
X pwr 1 0 0 0 U 50 50 0 0 w
|
||||||
|
ENDDRAW
|
||||||
|
ENDDEF
|
||||||
|
#
|
||||||
|
#End Library
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,43 @@
|
||||||
|
update=gio 30 mag 2019 20:40:12 CEST
|
||||||
|
version=1
|
||||||
|
last_client=kicad
|
||||||
|
[general]
|
||||||
|
version=1
|
||||||
|
RootSch=
|
||||||
|
BoardNm=
|
||||||
|
[pcbnew]
|
||||||
|
version=1
|
||||||
|
LastNetListRead=
|
||||||
|
UseCmpFile=1
|
||||||
|
PadDrill=0.600000000000
|
||||||
|
PadDrillOvalY=0.600000000000
|
||||||
|
PadSizeH=1.500000000000
|
||||||
|
PadSizeV=1.500000000000
|
||||||
|
PcbTextSizeV=1.500000000000
|
||||||
|
PcbTextSizeH=1.500000000000
|
||||||
|
PcbTextThickness=0.300000000000
|
||||||
|
ModuleTextSizeV=1.000000000000
|
||||||
|
ModuleTextSizeH=1.000000000000
|
||||||
|
ModuleTextSizeThickness=0.150000000000
|
||||||
|
SolderMaskClearance=0.000000000000
|
||||||
|
SolderMaskMinWidth=0.000000000000
|
||||||
|
DrawSegmentWidth=0.200000000000
|
||||||
|
BoardOutlineThickness=0.100000000000
|
||||||
|
ModuleOutlineThickness=0.150000000000
|
||||||
|
[cvpcb]
|
||||||
|
version=1
|
||||||
|
NetIExt=net
|
||||||
|
[eeschema]
|
||||||
|
version=1
|
||||||
|
LibDir=
|
||||||
|
[eeschema/libraries]
|
||||||
|
[schematic_editor]
|
||||||
|
version=1
|
||||||
|
PageLayoutDescrFile=
|
||||||
|
PlotDirectoryName=./nrf.pdf
|
||||||
|
SubpartIdSeparator=0
|
||||||
|
SubpartFirstId=65
|
||||||
|
NetFmtName=
|
||||||
|
SpiceAjustPassiveValues=0
|
||||||
|
LabSize=50
|
||||||
|
ERC_TestSimilarLabels=1
|
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue