mirror of https://github.com/giuliof/nRF24-key.git
75 lines
2.9 KiB
C
75 lines
2.9 KiB
C
#ifndef __24L01_H
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#define __24L01_H
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#include "utils.h"
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#define PIN_SPI_CS B,3 // CSN
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#define PIN_24L01_CE B,4 // CE
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#define PIN_24L01_IRQ B,2
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#define SPI_CS_HIGH() (OUT(PIN_SPI_CS) |= _BV(PIN(PIN_SPI_CS)))
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#define SPI_CS_LOW() (OUT(PIN_SPI_CS) &= ~_BV(PIN(PIN_SPI_CS)))
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#define NRF24L01_CE_HIGH() (OUT(PIN_24L01_CE) |= _BV(PIN(PIN_24L01_CE)))
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#define NRF24L01_CE_LOW() (OUT(PIN_24L01_CE) &= ~_BV(PIN(PIN_24L01_CE)))
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#define NRF24L01_IRQ() (IN(PIN_24L01_IRQ) & _BV(PIN(PIN_24L01_IRQ)))
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// Commands
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#define NRF_READ_REG 0x00 // Read register. lower 5 bits are register address
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#define NRF_WRITE_REG 0x20 // Write register. lower 5 bits are register address
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#define RD_RX_PLOAD 0x61 // Read RX data
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#define WR_TX_PLOAD 0xA0 // Write TX data
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#define FLUSH_TX 0xE1 // Clear FIFO TX register
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#define FLUSH_RX 0xE2 // Clear FIFO RX register
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#define REUSE_TX_PL 0xE3 // Reuse previous packet
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#define NOP 0xFF // Null operation (read status register)
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// Register Addresses
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#define CONFIG 0x00 // Configure register
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#define EN_AA 0x01 // Enable automatic answer function
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#define EN_RXADDR 0x02 // Enable receive address
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#define SETUP_AW 0x03 // Setup address width
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#define SETUP_RETR 0x04 // Automatic retransmission
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#define RF_CH 0x05 // Set channel frequency
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#define RF_SETUP 0x06 // Set transmission rate, LNA gain, transmit power
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#define STATUS 0x07 // Status register
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#define OBSERVE_TX 0x08 // Transmission detection
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#define CD 0x09 // Carrier detection
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#define RX_ADDR_P0 0x0A // RX address for data channel 0
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#define RX_ADDR_P1 0x0B // RX address for data channel 1
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#define RX_ADDR_P2 0x0C // RX address for data channel 2
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#define RX_ADDR_P3 0x0D // RX address for data channel 3
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#define RX_ADDR_P4 0x0E // RX address for data channel 4
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#define RX_ADDR_P5 0x0F // RX address for data channel 5
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#define TX_ADDR 0x10 // TX address
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#define RX_PW_P0 0x11 // RX data for channel 0
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#define RX_PW_P1 0x12 // RX data for channel 1
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#define RX_PW_P2 0x13 // RX data for channel 2
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#define RX_PW_P3 0x14 // RX data for channel 3
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#define RX_PW_P4 0x15 // RX data for channel 4
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#define RX_PW_P5 0x16 // RX data for channel 5
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#define NRF_FIFO_STATUS 0x17 // FIFO status register
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// Return values
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enum {
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MAX_TX = 0x10,
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TX_OK = 0x20,
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RX_OK = 0x40
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};
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#define TX_ADR_WIDTH 5
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#define RX_ADR_WIDTH 5
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#define TX_PLOAD_WIDTH 32
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#define RX_PLOAD_WIDTH 32
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void NRF24L01_Init(void);
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void NRF24L01_SetUp(void);
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void NRF24L01_RX_Mode(void);
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void NRF24L01_TX_Mode(void);
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uint8_t NRF24L01_Check(void);
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uint8_t NRF24L01_TxPacket(uint8_t *txbuf);
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uint8_t NRF24L01_RxPacket(uint8_t *rxbuf);
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void NRF24L01_DumpCfg(void);
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void NRF24L01_UpdateCfg(void);
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#endif |